Friday 28 June 2013

Testing this Morning

I've been making good progress on my generic driver for the i2c bus as well as the /dev interface. I decided that I've gotten far enough along that I can start doing some testing. For testing, I'm using a CAT24C256 EEPROM on a bread board. This is the same chip that's used in the capes (expansion boards) for the BeagleBone. My test setup has one of those chips on a bread board. It's a fairly basic setup... connect 3.3V and GND, connect SCL/SDA to the right pins on the connector (with 5.6K pull-up resistors), and set the address pins. Details about the pins on the BBB's connectors and a schematic for the EEPROM can be found in the System Reference Manual. Here's a photo of my setup with the EEPROM on the 2nd I2C bus with an address of 0x50:

http://tomcort.com/gsoc/testjig.jpgI imported the i2cscan program from NetBSD into my source tree and it was able to discover the chip:

http://tomcort.com/gsoc/i2cscan-found-eeprom.png

I've got another test program that can read from specific memory locations within the EEPROM. I'm going to enhance it to perform writes to specific locations. Then I'll be able to test reading what I've written. I'll repeat the steps on the 3rd i2c bus and then again on the buses of the BeagleBoard-xM.



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